Paged Segmentation (Segmented Paging)
In memory management, we have seen two primary non-contiguous strategies, each with a fatal flaw.
Pure Paging completely eliminates external fragmentation by using fixed-size blocks, but it ignores the logical structure of a program, making access control and sharing difficult. Pure Segmentation respects the logical structure of a program, but its variable-sized chunks lead to severe external fragmentation.
What if we could combine them to get the best of both worlds?
The Best of Both Worlds
Paged Segmentation (often called Segmented Paging) is exactly what it sounds like: a hybrid approach. It applies both techniques sequentially.
First, it divides the user's process into logical, variable-sized Segments (like Code, Data, and Stack) just like standard segmentation. Second, instead of trying to load those massive, awkwardly sized segments directly into RAM, it divides each Segment into fixed-size Pages.
Paged Segmentation: The process is split into Segments, and then each Segment is split into Pages, which map to Frames.
How It Works
- The program is logically divided into variable-sized Segments based on programmer perspective.
- Every single Segment is then chopped into standard, fixed-size Pages (e.g., 4 KB each).
- Physical RAM is divided into standard, fixed-size Frames (also 4 KB each).
- The Pages of the Segments are scattered and loaded into whatever empty Frames are available in RAM.
The Three-Part Logical Address
Because the memory is cut twice, the CPU can no longer use a simple two-part address. It must generate a three-part Logical Address to find specific data:
Logical Address = < s, p, d >
s = Segment Number (Which logical module? e.g., The Data Segment)
p = Page Number (Which page inside that specific segment?)
d = Page Offset (Which exact byte inside that specific page?)The Two-Level Table Lookup
Combining the techniques means combining the tracking tables. The OS now has to maintain a master Segment Table, and a separate Page Table for EVERY individual segment.
The hardware translation happens in two distinct steps:
- Step 1: The CPU extracts the Segment Number (s) and looks it up in the main Segment Table.
- Step 2: Instead of pointing to a physical RAM address, the Segment Table entry points to the base address of the Page Table specifically assigned to that segment.
- Step 3: The OS uses the Page Number (p) to look up the exact Frame Number in that specific Page Table.
- Step 4: The OS adds the Offset (d) to the Frame's starting address to arrive at the final Physical Address.
Pros and Cons of Paged Segmentation
| Advantages | Disadvantages |
|---|---|
| No External Fragmentation: Because the final pieces are fixed-size pages fitting into fixed-size frames, external fragmentation is completely eliminated. | High Memory Overhead: Maintaining a master Segment Table plus multiple Page Tables per process consumes a significant amount of RAM. |
| Security & Sharing: Access control (Read/Write) can be applied perfectly at the segment level. Entire segments can be easily shared between processes. | Slower Execution: Address translation requires two separate table lookups in memory before the CPU even reaches the actual data, severely slowing down execution. |
| Minimal Internal Fragmentation: Space is only wasted on the very last page of each segment, keeping waste extremely low. | Complex Hardware: Requires sophisticated Memory Management Unit (MMU) hardware to perform the dual-lookup math on the fly. |
Summary
Paged Segmentation is the ultimate compromise in memory management architecture. By segmenting the program first, it provides the security, isolation, and sharing capabilities programmers need. By paging those segments second, it provides the fixed-size block efficiency the hardware needs to defeat external fragmentation.
The cost of this perfection is complexity. It requires extensive memory overhead to store the dual-layered tables and relies on heavily optimized hardware to prevent the two-step translation process from crippling the system's speed.
Tracing the Three-Part Translation
Question 1 of 1Test your understanding of the hardware lookup sequence in Paged Segmentation.