Interrupt-Driven I/O
In the previous lesson, we saw that Programmed I/O forces the CPU into a 'Busy-Waiting' loop, which is a massive waste of processing power.
Interrupt-Driven I/O is the smarter alternative. It allows the CPU to issue an I/O command and then immediately switch to another task, only returning to the I/O operation when the device signals that it is ready.
The Interrupt Mechanism
Hardware devices use a dedicated electrical wire called an Interrupt-Request Line. When a device controller finishes its task, it sends a high-voltage signal across this wire to grab the CPU's attention.
Think of it like a student raising their hand in class. The teacher (CPU) can keep lecturing until someone signals they have a question.
The Interrupt Life Cycle
When an interrupt occurs, the OS follows a strict sequence to handle it without losing data:
- The OS issues an I/O command and starts another process.
- The device controller performs the I/O. Once finished, it raises the Interrupt-Request Line.
- The CPU finishes its current instruction and detects the interrupt signal.
- The CPU saves its current state (Program Counter, Registers) to the stack so it can resume later.
- The CPU looks up the correct code to run in the Interrupt Vector Table (IVT).
- The CPU executes the Interrupt Service Routine (ISR) to handle the data.
- The CPU restores the saved state and resumes the interrupted process.
The Interrupt Service Routine (ISR)
An ISR is a specialized function within the device driver. Its job is to interact with the device controller's registers, move data from the Data-In register to memory, and signal to the OS that the I/O request is complete.
ISR code must be extremely fast and efficient, as the entire system is effectively 'paused' while the ISR is running.
Priority and Masking
Not all interrupts are created equal. Modern processors use two techniques to manage them:
- Priority Level: A high-speed device (like a disk) has a higher priority than a slow device (like a mouse). If both interrupt at once, the CPU serves the high-priority one first.
- Interrupt Masking: The CPU can temporarily 'mute' certain interrupts (Maskable Interrupts) if it is busy with a critical task. However, Non-Maskable Interrupts (NMI), such as power failure or memory errors, cannot be ignored.
Summary
Interrupt-Driven I/O is the backbone of multitasking. By allowing hardware to signal the CPU only when needed, the OS can keep the processor 100% busy with useful computation instead of wasting millions of cycles checking status registers.